Van der Waals Architectures for Next-Generation AI Electronics

Objective

VANDAI aims to deliver a breakthrough in sustainable AI hardware by developing wafer-scale, device-quality indium selenide (InSe) transistors as an energy-efficient alternative to silicon. With data centers projected to consume up to 30% of national electricity by 2034, largely driven by AI workloads, replacing today’s energy-intensive silicon devices is urgent. InSe, a 2D semiconductor with a direct, thickness-tunable bandgap and high carrier mobility, offers exceptional potential for next-generation transistors. However, scalable synthesis of defect-controlled InSe films remains a critical barrier. This project will overcome that barrier by using van der Waals buffer layers—wafer-scale h-BN or MoS2 films grown on silicon—to minimize lattice mismatch, suppress defect nucleation, and enable coherent InSe growth. The workflow integrates (i) wafer-scale buffer synthesis with <5% thickness variation, (ii) buffer/InSe interface analysis to quantify coherency and defect initiation, (iii) InSe growth by optimized MOCVD at device-compatible conditions, and (iv) feedback from advanced TEM, AFM, Raman, and XPS to refine growth. A prototype lateral field-effect transistor (FET) will then be fabricated and electrically validated, targeting benchmark values for mobility, on/off ratio, and switching stability. The fellowship combines advanced synthesis with state-of-the-art characterization and leverages expertise at Queen Mary University of London and the University of Cambridge. It will generate open datasets, high-impact publications, and industry-relevant patents, while strengthening the researcher’s skills in 2D materials and device fabrication. VANDAI directly supports the European Green Deal by reducing the carbon footprint of AI computing and positioning the UK and EU as leaders in 2D semiconductor manufacturing. The outcomes will pave the way for low-power electronics, new industrial opportunities, and climate-resilient digital infrastructure.